[FPGA] ZCU102: VPG-HDMI

2025.03.13

ZYBO에서 진행했던 VPG를 ZCU102에서 구현하려고 하는데,

rgb2dvi 가 안보인다.

https://github.com/Digilent/vivado-library

링크에서 다시 다운받고

플로우 네비게이터 -> 프로젝트 관리자 -> 설정, IP -> 리포지토리 추가

IP 리스트에 다른 것들은 나오는데 rgb2dvi 안나온다.

버전에 제한이 걸렸나 싶어 2022.1, 2024.2 둘다 안된다.

Digilent 제품에만 제한이 걸린 것인가 검색

https://forum.digilent.com/topic/24942-ipcore-rgb2dvi-for-zynq-ultrascale/

 

답변내용

Unfortunately, this IP (rgb2dvi) is not supported for Ultrascale+ architecture and the IP will not be updated to support it for the forseeable future. This is partially because the SHIFTINx and SHIFTOUTx signals are no longer present on the OSERDES primitives, which the rgb2dvi core used to be able to serialize words larger than 8 bits, so any sort of upgrade effort would be non-trivial and likely require a lot of restructuring.

On the Genesys ZU, Digilent instead used Xilinx's HDMI 1.4/2.0 Transmitter Subsystem and Video PHY Controller IPs (as per here: https://digilent.com/reference/programmable-logic/genesys-zu/reference-manual#hdmi_source) for it's HDMI demo (https://digilent.com/reference/programmable-logic/genesys-zu/demos/hdmi) but the HDMI subsystem IP from Xilinx is not free.